Integrated Circuit Chips: Difference between revisions

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This is a collection of pinouts and basic descriptions for all of the various chips used in NerdConsole.
There are several different types of chips used in NerdConsole.
= Processor =
== 65C02 ==
This is the main processor in NerdConsole.  It is operated at 6.00 MHz.


{| class="wikitable"
== Processor ==
| style="text-align:right" width="180" | ~VP (Vector Pull)
* [[Chip - 65C02 CPU|65C02 CPU]]
! style="text-align:left" width="30" | 1
== RAM ==
! style="text-align:right" width="30" | 40
System RAM in NerdConsole should operate at 55ns or faster.
| style="text-align:left" width="180" | ~RES (Reset)
* [[Chip - AS6C62256 32KB RAM|AS6C62256 32KB RAM]]
|-
* [[Chip - AS6C4008 512KB RAM|AS6C4008 512KB RAM]]
| style="text-align:right" | RDY (Ready)
== ROM ==
! style="text-align:left" | 2
Cartridge ROM in NerdConsole should operate at 150ns or faster.
! style="text-align:right" | 39
* [[Chip - AT28C64 8KB ROM|AT28C64 8KB ROM]]
| style="text-align:left" | PHI2O (Phase 2 Clock Out)
* [[Chip - AT28C256 32KB ROM|AT28C256 32KB ROM]]
|-
* [[Chip - W27C512 64KB ROM|W27C512 64KB ROM]]
| style="text-align:right" | PHI1O (Phase 1 Clock Out)
* [[Chip - SST39SF010 128KB ROM|SST39SF010 128KB ROM]]
! style="text-align:left" | 3
* [[Chip - SST39SF020 256KB ROM|SST39SF020 256KB ROM]]
! style="text-align:right" | 38
* [[Chip - SST39SF040 512KB ROM|SST39SF040 512KB ROM]]
| style="text-align:left" | ~SO (Set Overflow)
== Audio ==
|-
* [[Chip - YM-3812 Audio|YM-3812 Audio]]
| style="text-align:right" | ~IRQ (Interrupt Request)
* [[Chip - YM-3014 DAC|YM-3014 DAC]]
! style="text-align:left" | 4
* [[Chip - OPA2132 2x OpAmp|OPA2132 2x OpAmp]]
! style="text-align:right" | 37
* [[Chip - NE5532 2x OpAmp|NE5532 2x OpAmp]]
| style="text-align:left" | Phase 2 Clock In
|-
| style="text-align:right" | ~ML (Memory Lock)
! style="text-align:left" | 5
! style="text-align:right" | 36
| style="text-align:left" | BE (Bus Enable)
|-
| style="text-align:right" | ~NMI (Non-Maskable Interrupt)
! style="text-align:left" | 6
! style="text-align:right" | 35
| style="text-align:left" | NC
|-
| style="text-align:right" | SYNC
! style="text-align:left" | 7
! style="text-align:right" | 34
| style="text-align:left" | R~W (Read/~Write)
|-
| style="text-align:right" | VCC
! style="text-align:left" | 8
! style="text-align:right" | 33
| style="text-align:left" | D0
|-
| style="text-align:right" | A0
! style="text-align:left" | 9
! style="text-align:right" | 32
| style="text-align:left" | D1
|-
| style="text-align:right" | A1
! style="text-align:left" | 10
! style="text-align:right" | 31
| style="text-align:left" | D2
|-
| style="text-align:right" | A2
! style="text-align:left" | 11
! style="text-align:right" | 30
| style="text-align:left" | D3
|-
| style="text-align:right" | A3
! style="text-align:left" | 12
! style="text-align:right" | 29
| style="text-align:left" | D4
|-
| style="text-align:right" | A4
! style="text-align:left" | 13
! style="text-align:right" | 28
| style="text-align:left" | D5
|-
| style="text-align:right" | A5
! style="text-align:left" | 14
! style="text-align:right" | 27
| style="text-align:left" | D6
|-
| style="text-align:right" | A6
! style="text-align:left" | 15
! style="text-align:right" | 26
| style="text-align:left" | D7
|-
| style="text-align:right" | A7
! style="text-align:left" | 16
! style="text-align:right" | 25
| style="text-align:left" | A15
|-
| style="text-align:right" | A8
! style="text-align:left" | 17
! style="text-align:right" | 24
| style="text-align:left" | A14
|-
| style="text-align:right" | A9
! style="text-align:left" | 18
! style="text-align:right" | 23
| style="text-align:left" | A13
|-
| style="text-align:right" | A10
! style="text-align:left" | 19
! style="text-align:right" | 22
| style="text-align:left" | A12
|-
| style="text-align:right" | A11
! style="text-align:left" | 20
! style="text-align:right" | 21
| style="text-align:left" | GND
|}


= RAM =
== Logic ==
== AS6C62256 ==
* [[Chip - 74HCT00 4x 2-Input NAND|74HCT00 4x 2-Input NAND]]
This 32KB RAM chip is used for NerdConsole's 16KB of Main RAM.  There aren't any readily available 16KB static RAM chips, so the decision was made to use a 32KB chip instead, and only use half of it.  Main RAM was intentionally placed on a separate chip from Extended RAM to simplify bank selecting logic.
* [[Chip - 74HCT08 4x 2-Input AND|74HCT08 4x 2-Input AND]]
 
* [[Chip - 74HCT14 6x Inverter|74HCT14 6x Inverter]]
{| class="wikitable"
* [[Chip - 74HCT30 1x 8-Input NAND|74HCT30 1x 8-Input NAND]]
| style="text-align:right" width="180" | A14
* [[Chip - 74HCT32 4x 2-Input OR|74HCT32 4x 2-Input OR]]
! style="text-align:left" width="30" | 1
* [[Chip - 74HCT139 2x 2 to 4 Line Decoder|74HCT139 2x 2 to 4 Line Decoder]]
! style="text-align:right" width="30" | 28
* [[Chip - 74HCT238 1x 3 to 8 Line Decoder|74HCT238 1x 3 to 8 Line Decoder]]
| style="text-align:left" width="180" | VCC
* [[Chip - 74HCT240 8x Inverting Buffer|74HCT240 8x Inverting Buffer]]
|-
* [[Chip - 74HCT273 8x D-Type Flip-Flops|74HCT273 8x D-Type Flip-Flops]]
| style="text-align:right" | A12
== Clock ==
! style="text-align:left" | 2
* [[Chip - Crystal Oscillator|Crystal Oscillator]]
! style="text-align:right" | 27
== Reset ==
| style="text-align:left" | ~WE
* [[Chip - DS1813 Reset Manager|DS1813 Reset Manager]]
|-
| style="text-align:right" | A7
! style="text-align:left" | 3
! style="text-align:right" | 26
| style="text-align:left" | A13
|-
| style="text-align:right" | A6
! style="text-align:left" | 4
! style="text-align:right" | 25
| style="text-align:left" | A8
|-
| style="text-align:right" | A5
! style="text-align:left" | 5
! style="text-align:right" | 24
| style="text-align:left" | A9
|-
| style="text-align:right" | A4
! style="text-align:left" | 6
! style="text-align:right" | 23
| style="text-align:left" | A11
|-
| style="text-align:right" | A3
! style="text-align:left" | 7
! style="text-align:right" | 22
| style="text-align:left" | ~OE
|-
| style="text-align:right" | A2
! style="text-align:left" | 8
! style="text-align:right" | 21
| style="text-align:left" | A10
|-
| style="text-align:right" | A1
! style="text-align:left" | 9
! style="text-align:right" | 20
| style="text-align:left" | ~CE
|-
| style="text-align:right" | A0
! style="text-align:left" | 10
! style="text-align:right" | 19
| style="text-align:left" | D7
|-
| style="text-align:right" | D0
! style="text-align:left" | 11
! style="text-align:right" | 18
| style="text-align:left" | D6
|-
| style="text-align:right" | D1
! style="text-align:left" | 12
! style="text-align:right" | 17
| style="text-align:left" | D5
|-
| style="text-align:right" | D2
! style="text-align:left" | 13
! style="text-align:right" | 16
| style="text-align:left" | D4
|-
| style="text-align:right" | GND
! style="text-align:left" | 14
! style="text-align:right" | 15
| style="text-align:left" | D3
|}
 
== AS6C4008 ==
This 512KB RAM chip is used for Extended RAM and provides 32x 16KB banks.
 
{| class="wikitable"
| style="text-align:right" width="180" | A18
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 32
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | A16
! style="text-align:left" | 2
! style="text-align:right" | 31
| style="text-align:left" | A15
|-
| style="text-align:right" | A14
! style="text-align:left" | 3
! style="text-align:right" | 30
| style="text-align:left" | A17
|-
| style="text-align:right" | A12
! style="text-align:left" | 4
! style="text-align:right" | 29
| style="text-align:left" | ~WE
|-
| style="text-align:right" | A7
! style="text-align:left" | 5
! style="text-align:right" | 28
| style="text-align:left" | A13
|-
| style="text-align:right" | A6
! style="text-align:left" | 6
! style="text-align:right" | 27
| style="text-align:left" | A8
|-
| style="text-align:right" | A5
! style="text-align:left" | 7
! style="text-align:right" | 26
| style="text-align:left" | A9
|-
| style="text-align:right" | A4
! style="text-align:left" | 8
! style="text-align:right" | 25
| style="text-align:left" | A11
|-
| style="text-align:right" | A3
! style="text-align:left" | 9
! style="text-align:right" | 24
| style="text-align:left" | ~OE
|-
| style="text-align:right" | A2
! style="text-align:left" | 10
! style="text-align:right" | 23
| style="text-align:left" | A10
|-
| style="text-align:right" | A1
! style="text-align:left" | 11
! style="text-align:right" | 22
| style="text-align:left" | ~CE
|-
| style="text-align:right" | A0
! style="text-align:left" | 12
! style="text-align:right" | 21
| style="text-align:left" | D7
|-
| style="text-align:right" | D0
! style="text-align:left" | 13
! style="text-align:right" | 20
| style="text-align:left" | D6
|-
| style="text-align:right" | D1
! style="text-align:left" | 14
! style="text-align:right" | 19
| style="text-align:left" | D5
|-
| style="text-align:right" | D2
! style="text-align:left" | 15
! style="text-align:right" | 18
| style="text-align:left" | D4
|-
| style="text-align:right" | GND
! style="text-align:left" | 16
! style="text-align:right" | 17
| style="text-align:left" | D3
|}
 
= ROM =
Several different types of ROM chips can be used for cartridges.
== 8KB ==
== 32KB ==
== 64KB ==
== 128KB ==
== 256KB ==
== 512KB ==
 
= Audio =
== YM-3812 ==
== YM-3014 ==
 
= Logic =
NerdConsole uses a variety of logic chips for address decoding, holding register values, and buffering data as it moves between systems.
 
== 74HCT00 ==
This chip provides four 2-input NAND gates.
 
{| class="wikitable"
| style="text-align:right" width="180" | 1A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1B
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | 4B
|-
| style="text-align:right" | 1Y
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | 4A
|-
| style="text-align:right" | 2A
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | 4Y
|-
| style="text-align:right" | 2B
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | 3B
|-
| style="text-align:right" | 2Y
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | 3A
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | 3Y
|}
 
== 74HCT08 ==
This chip provides four 2-input AND gates.
 
{| class="wikitable"
| style="text-align:right" width="180" | 1A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1B
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | 4B
|-
| style="text-align:right" | 1Y
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | 4A
|-
| style="text-align:right" | 2A
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | 4Y
|-
| style="text-align:right" | 2B
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | 3B
|-
| style="text-align:right" | 2Y
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | 3A
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | 3Y
|}
 
== 74HCT14 ==
This chip provides six signal inverters.
 
{| class="wikitable"
| style="text-align:right" width="180" | 1A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1Y
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | 6A
|-
| style="text-align:right" | 2A
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | 6Y
|-
| style="text-align:right" | 2Y
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | 5A
|-
| style="text-align:right" | 3A
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | 5Y
|-
| style="text-align:right" | 3Y
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | 4A
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | 4Y
|}
 
== 74HCT30 ==
This chip provides a single 8-input NAND gate.  This is used to identify when extended RAM bank 255 is selected and thus extended RAM writes should instead be directed to the PPU.
 
{| class="wikitable"
| style="text-align:right" width="180" | A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | B
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | NC
|-
| style="text-align:right" | C
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | H
|-
| style="text-align:right" | D
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | G
|-
| style="text-align:right" | E
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | NC
|-
| style="text-align:right" | F
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | NC
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | Y
|}
 
== 74HCT32 ==
This chip provides four 2-input OR gates.
 
{| class="wikitable"
| style="text-align:right" width="180" | 1A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1B
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | 4B
|-
| style="text-align:right" | 1Y
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | 4A
|-
| style="text-align:right" | 2A
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | 4Y
|-
| style="text-align:right" | 2B
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | 3B
|-
| style="text-align:right" | 2Y
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | 3A
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | 3Y
|}
 
== 74HCT139 ==
This chip is provides 2 separate 2 to 4 line decoders.  Each takes 2 inputs as a 2-bit number (0-3) and turns on the single line that corresponds to that number as output.
 
{| class="wikitable"
| style="text-align:right" width="180" | ~1G
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 16
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1A
! style="text-align:left" | 2
! style="text-align:right" | 15
| style="text-align:left" | ~2G
|-
| style="text-align:right" | 1B
! style="text-align:left" | 3
! style="text-align:right" | 14
| style="text-align:left" | 2A
|-
| style="text-align:right" | 1Y0
! style="text-align:left" | 4
! style="text-align:right" | 13
| style="text-align:left" | 2B
|-
| style="text-align:right" | 1Y1
! style="text-align:left" | 5
! style="text-align:right" | 12
| style="text-align:left" | 2Y0
|-
| style="text-align:right" | 1Y2
! style="text-align:left" | 6
! style="text-align:right" | 11
| style="text-align:left" | 2Y1
|-
| style="text-align:right" | 1Y3
! style="text-align:left" | 7
! style="text-align:right" | 10
| style="text-align:left" | 2Y2
|-
| style="text-align:right" | GND
! style="text-align:left" | 8
! style="text-align:right" | 9
| style="text-align:left" | 2Y3
|}
 
== 74HCT238 ==
This chip is a 3 to 8 line decoder.  It takes 3 inputs as a 3-bit number (0-7) and turns on the single line that corresponds to that number as output.
 
{| class="wikitable"
| style="text-align:right" width="180" | A0
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 16
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | A1
! style="text-align:left" | 2
! style="text-align:right" | 15
| style="text-align:left" | Y0
|-
| style="text-align:right" | A2
! style="text-align:left" | 3
! style="text-align:right" | 14
| style="text-align:left" | Y1
|-
| style="text-align:right" | ~G0
! style="text-align:left" | 4
! style="text-align:right" | 13
| style="text-align:left" | Y2
|-
| style="text-align:right" | ~G1
! style="text-align:left" | 5
! style="text-align:right" | 12
| style="text-align:left" | Y3
|-
| style="text-align:right" | G2
! style="text-align:left" | 6
! style="text-align:right" | 11
| style="text-align:left" | Y4
|-
| style="text-align:right" | Y7
! style="text-align:left" | 7
! style="text-align:right" | 10
| style="text-align:left" | Y5
|-
| style="text-align:right" | GND
! style="text-align:left" | 8
! style="text-align:right" | 9
| style="text-align:left" | Y6
|}
 
== 74HCT240 ==
This chip reads the state of all 8 possible controllers and inverts the signal turning the 0s from pressed buttons into 1s.
 
{| class="wikitable"
| style="text-align:right" width="180" | ~1OE
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 20
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1A0
! style="text-align:left" | 2
! style="text-align:right" | 19
| style="text-align:left" | ~2OE
|-
| style="text-align:right" | ~2Y3
! style="text-align:left" | 3
! style="text-align:right" | 18
| style="text-align:left" | ~1Y0
|-
| style="text-align:right" | 1A1
! style="text-align:left" | 4
! style="text-align:right" | 17
| style="text-align:left" | 2A3
|-
| style="text-align:right" | ~2Y2
! style="text-align:left" | 5
! style="text-align:right" | 16
| style="text-align:left" | ~1Y1
|-
| style="text-align:right" | 1A2
! style="text-align:left" | 6
! style="text-align:right" | 15
| style="text-align:left" | 2A2
|-
| style="text-align:right" | ~2Y1
! style="text-align:left" | 7
! style="text-align:right" | 14
| style="text-align:left" | ~1Y2
|-
| style="text-align:right" | 1A3
! style="text-align:left" | 8
! style="text-align:right" | 13
| style="text-align:left" | 2A1
|-
| style="text-align:right" | ~2Y0
! style="text-align:left" | 9
! style="text-align:right" | 12
| style="text-align:left" | ~1Y3
|-
| style="text-align:right" | GND
! style="text-align:left" | 10
! style="text-align:right" | 11
| style="text-align:left" | 2A0
|}
 
== 74HCT273 ==
This chip provides an octal D-type flip-flops with a clear pin for ensuring a known state upon system reset.  These are commonly used for holding upper address pin values for bank selection.
 
{| class="wikitable"
| style="text-align:right" width="180" | ~CLR
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 20
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1Q
! style="text-align:left" | 2
! style="text-align:right" | 19
| style="text-align:left" | 8Q
|-
| style="text-align:right" | 1D
! style="text-align:left" | 3
! style="text-align:right" | 18
| style="text-align:left" | 8D
|-
| style="text-align:right" | 2D
! style="text-align:left" | 4
! style="text-align:right" | 17
| style="text-align:left" | 7D
|-
| style="text-align:right" | 2Q
! style="text-align:left" | 5
! style="text-align:right" | 16
| style="text-align:left" | 7Q
|-
| style="text-align:right" | 3Q
! style="text-align:left" | 6
! style="text-align:right" | 15
| style="text-align:left" | 6Q
|-
| style="text-align:right" | 3D
! style="text-align:left" | 7
! style="text-align:right" | 14
| style="text-align:left" | 6D
|-
| style="text-align:right" | 4D
! style="text-align:left" | 8
! style="text-align:right" | 13
| style="text-align:left" | 5D
|-
| style="text-align:right" | 4Q
! style="text-align:left" | 9
! style="text-align:right" | 12
| style="text-align:left" | 5Q
|-
| style="text-align:right" | GND
! style="text-align:left" | 10
! style="text-align:right" | 11
| style="text-align:left" | CLK
|}

Latest revision as of 15:25, 23 January 2024

There are several different types of chips used in NerdConsole.

Processor

RAM

System RAM in NerdConsole should operate at 55ns or faster.

ROM

Cartridge ROM in NerdConsole should operate at 150ns or faster.

Audio

Logic

Clock

Reset

Retrieved from "http://wiki.nerdconsole.com:80/index.php?title=Integrated_Circuit_Chips&oldid=415"