Integrated Circuit Chips: Difference between revisions

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== Clock ==
== Clock ==
* [[Chip - Crystal Oscillator|Crystal Oscillator]]
* [[Chip - Crystal Oscillator|Crystal Oscillator]]
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= STILL MOVING CHIP PINOUTS TO THEIR OWN PAGES =
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== 74HCT14 ==
This chip provides six signal inverters.
{| class="wikitable"
| style="text-align:right" width="180" | 1A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1Y
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | 6A
|-
| style="text-align:right" | 2A
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | 6Y
|-
| style="text-align:right" | 2Y
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | 5A
|-
| style="text-align:right" | 3A
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | 5Y
|-
| style="text-align:right" | 3Y
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | 4A
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | 4Y
|}
== 74HCT30 ==
This chip provides a single 8-input NAND gate.  This is used to identify when extended RAM bank 255 is selected and thus extended RAM writes should instead be directed to the PPU.
{| class="wikitable"
| style="text-align:right" width="180" | A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | B
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | NC
|-
| style="text-align:right" | C
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | H
|-
| style="text-align:right" | D
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | G
|-
| style="text-align:right" | E
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | NC
|-
| style="text-align:right" | F
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | NC
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | Y
|}
== 74HCT32 ==
This chip provides four 2-input OR gates.
{| class="wikitable"
| style="text-align:right" width="180" | 1A
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 14
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1B
! style="text-align:left" | 2
! style="text-align:right" | 13
| style="text-align:left" | 4B
|-
| style="text-align:right" | 1Y
! style="text-align:left" | 3
! style="text-align:right" | 12
| style="text-align:left" | 4A
|-
| style="text-align:right" | 2A
! style="text-align:left" | 4
! style="text-align:right" | 11
| style="text-align:left" | 4Y
|-
| style="text-align:right" | 2B
! style="text-align:left" | 5
! style="text-align:right" | 10
| style="text-align:left" | 3B
|-
| style="text-align:right" | 2Y
! style="text-align:left" | 6
! style="text-align:right" | 9
| style="text-align:left" | 3A
|-
| style="text-align:right" | GND
! style="text-align:left" | 7
! style="text-align:right" | 8
| style="text-align:left" | 3Y
|}
== 74HCT139 ==
This chip is provides 2 separate 2 to 4 line decoders.  Each takes 2 inputs as a 2-bit number (0-3) and turns on the single line that corresponds to that number as output.
{| class="wikitable"
| style="text-align:right" width="180" | ~1G
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 16
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1A
! style="text-align:left" | 2
! style="text-align:right" | 15
| style="text-align:left" | ~2G
|-
| style="text-align:right" | 1B
! style="text-align:left" | 3
! style="text-align:right" | 14
| style="text-align:left" | 2A
|-
| style="text-align:right" | 1Y0
! style="text-align:left" | 4
! style="text-align:right" | 13
| style="text-align:left" | 2B
|-
| style="text-align:right" | 1Y1
! style="text-align:left" | 5
! style="text-align:right" | 12
| style="text-align:left" | 2Y0
|-
| style="text-align:right" | 1Y2
! style="text-align:left" | 6
! style="text-align:right" | 11
| style="text-align:left" | 2Y1
|-
| style="text-align:right" | 1Y3
! style="text-align:left" | 7
! style="text-align:right" | 10
| style="text-align:left" | 2Y2
|-
| style="text-align:right" | GND
! style="text-align:left" | 8
! style="text-align:right" | 9
| style="text-align:left" | 2Y3
|}
== 74HCT238 ==
This chip is a 3 to 8 line decoder.  It takes 3 inputs as a 3-bit number (0-7) and turns on the single line that corresponds to that number as output.
{| class="wikitable"
| style="text-align:right" width="180" | A0
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 16
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | A1
! style="text-align:left" | 2
! style="text-align:right" | 15
| style="text-align:left" | Y0
|-
| style="text-align:right" | A2
! style="text-align:left" | 3
! style="text-align:right" | 14
| style="text-align:left" | Y1
|-
| style="text-align:right" | ~G0
! style="text-align:left" | 4
! style="text-align:right" | 13
| style="text-align:left" | Y2
|-
| style="text-align:right" | ~G1
! style="text-align:left" | 5
! style="text-align:right" | 12
| style="text-align:left" | Y3
|-
| style="text-align:right" | G2
! style="text-align:left" | 6
! style="text-align:right" | 11
| style="text-align:left" | Y4
|-
| style="text-align:right" | Y7
! style="text-align:left" | 7
! style="text-align:right" | 10
| style="text-align:left" | Y5
|-
| style="text-align:right" | GND
! style="text-align:left" | 8
! style="text-align:right" | 9
| style="text-align:left" | Y6
|}
== 74HCT240 ==
This chip reads the state of all 8 possible controllers and inverts the signal turning the 0s from pressed buttons into 1s.
{| class="wikitable"
| style="text-align:right" width="180" | ~1OE
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 20
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1A0
! style="text-align:left" | 2
! style="text-align:right" | 19
| style="text-align:left" | ~2OE
|-
| style="text-align:right" | ~2Y3
! style="text-align:left" | 3
! style="text-align:right" | 18
| style="text-align:left" | ~1Y0
|-
| style="text-align:right" | 1A1
! style="text-align:left" | 4
! style="text-align:right" | 17
| style="text-align:left" | 2A3
|-
| style="text-align:right" | ~2Y2
! style="text-align:left" | 5
! style="text-align:right" | 16
| style="text-align:left" | ~1Y1
|-
| style="text-align:right" | 1A2
! style="text-align:left" | 6
! style="text-align:right" | 15
| style="text-align:left" | 2A2
|-
| style="text-align:right" | ~2Y1
! style="text-align:left" | 7
! style="text-align:right" | 14
| style="text-align:left" | ~1Y2
|-
| style="text-align:right" | 1A3
! style="text-align:left" | 8
! style="text-align:right" | 13
| style="text-align:left" | 2A1
|-
| style="text-align:right" | ~2Y0
! style="text-align:left" | 9
! style="text-align:right" | 12
| style="text-align:left" | ~1Y3
|-
| style="text-align:right" | GND
! style="text-align:left" | 10
! style="text-align:right" | 11
| style="text-align:left" | 2A0
|}
== 74HCT273 ==
This chip provides an octal D-type flip-flops with a clear pin for ensuring a known state upon system reset.  These are commonly used for holding upper address pin values for bank selection.
{| class="wikitable"
| style="text-align:right" width="180" | ~CLR
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 20
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | 1Q
! style="text-align:left" | 2
! style="text-align:right" | 19
| style="text-align:left" | 8Q
|-
| style="text-align:right" | 1D
! style="text-align:left" | 3
! style="text-align:right" | 18
| style="text-align:left" | 8D
|-
| style="text-align:right" | 2D
! style="text-align:left" | 4
! style="text-align:right" | 17
| style="text-align:left" | 7D
|-
| style="text-align:right" | 2Q
! style="text-align:left" | 5
! style="text-align:right" | 16
| style="text-align:left" | 7Q
|-
| style="text-align:right" | 3Q
! style="text-align:left" | 6
! style="text-align:right" | 15
| style="text-align:left" | 6Q
|-
| style="text-align:right" | 3D
! style="text-align:left" | 7
! style="text-align:right" | 14
| style="text-align:left" | 6D
|-
| style="text-align:right" | 4D
! style="text-align:left" | 8
! style="text-align:right" | 13
| style="text-align:left" | 5D
|-
| style="text-align:right" | 4Q
! style="text-align:left" | 9
! style="text-align:right" | 12
| style="text-align:left" | 5Q
|-
| style="text-align:right" | GND
! style="text-align:left" | 10
! style="text-align:right" | 11
| style="text-align:left" | CLK
|}
= Clock =
Clock generation is handled with crystal oscillators.  Regardless of the size (DIP-8 or DIP-14) the pinout is the same.
{| class="wikitable"
| style="text-align:right" width="180" | NC
! style="text-align:left" width="30" | 1
! style="text-align:right" width="30" | 4
| style="text-align:left" width="180" | VCC
|-
| style="text-align:right" | GND
! style="text-align:left" | 2
! style="text-align:right" | 3
| style="text-align:left" | Clock
|}
== CPU Clock ==
The main CPU in NerdConsole operates at 6.00 MHz.
== Audio Clock ==
The audio system in NerdConsole operates at 3.58 MHz.  There is an independent clock crystal for this instead of doing clock division of the main CPU clock which would be less accurate and difficult.

Revision as of 16:46, 22 January 2024

There are several different types of chips used in NerdConsole.

Processor

RAM

System RAM in NerdConsole should operate at 55ns or faster.

ROM

Cartridge ROM in NerdConsole should operate at 150ns or faster.

Audio

Logic

Clock

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