Integrated Circuit Chips
This is a collection of pinouts and basic descriptions for all of the various chips used in NerdConsole.
Processor
65C02
This is the main processor in NerdConsole. It is operated at 6.00 MHz.
| ~VP (Vector Pull) | 1 | 40 | ~RES (Reset) |
|---|---|---|---|
| RDY (Ready) | 2 | 39 | PHI2O (Phase 2 Clock Out) |
| PHI1O (Phase 1 Clock Out) | 3 | 38 | ~SO (Set Overflow) |
| ~IRQ (Interrupt Request) | 4 | 37 | Phase 2 Clock In |
| ~ML (Memory Lock) | 5 | 36 | BE (Bus Enable) |
| ~NMI (Non-Maskable Interrupt) | 6 | 35 | NC |
| SYNC | 7 | 34 | R~W (Read/~Write) |
| VCC | 8 | 33 | D0 |
| A0 | 9 | 32 | D1 |
| A1 | 10 | 31 | D2 |
| A2 | 11 | 30 | D3 |
| A3 | 12 | 29 | D4 |
| A4 | 13 | 28 | D5 |
| A5 | 14 | 27 | D6 |
| A6 | 15 | 26 | D7 |
| A7 | 16 | 25 | A15 |
| A8 | 17 | 24 | A14 |
| A9 | 18 | 23 | A13 |
| A10 | 19 | 22 | A12 |
| A11 | 20 | 21 | GND |
RAM
AS6C62256
This 32KB RAM chip is used for NerdConsole's 16KB of Main RAM. There aren't any readily available 16KB static RAM chips, so the decision was made to use a 32KB chip instead, and only use half of it. Main RAM was intentionally placed on a separate chip from Extended RAM to simplify bank selecting logic.
| A14 | 1 | 28 | VCC |
|---|---|---|---|
| A12 | 2 | 27 | ~WE |
| A7 | 3 | 26 | A13 |
| A6 | 4 | 25 | A8 |
| A5 | 5 | 24 | A9 |
| A4 | 6 | 23 | A11 |
| A3 | 7 | 22 | ~OE |
| A2 | 8 | 21 | A10 |
| A1 | 9 | 20 | ~CE |
| A0 | 10 | 19 | D7 |
| D0 | 11 | 18 | D6 |
| D1 | 12 | 17 | D5 |
| D2 | 13 | 16 | D4 |
| GND | 14 | 15 | D3 |
AS6C4008
This 512KB RAM chip is used for Extended RAM and provides 32x 16KB banks.
| A18 | 1 | 32 | VCC |
|---|---|---|---|
| A16 | 2 | 31 | A15 |
| A14 | 3 | 30 | A17 |
| A12 | 4 | 29 | ~WE |
| A7 | 5 | 28 | A13 |
| A6 | 6 | 27 | A8 |
| A5 | 7 | 26 | A9 |
| A4 | 8 | 25 | A11 |
| A3 | 9 | 24 | ~OE |
| A2 | 10 | 23 | A10 |
| A1 | 11 | 22 | ~CE |
| A0 | 12 | 21 | D7 |
| D0 | 13 | 20 | D6 |
| D1 | 14 | 19 | D5 |
| D2 | 15 | 18 | D4 |
| GND | 16 | 17 | D3 |
ROM
Several different types of ROM chips can be used for cartridges.
8KB
32KB
64KB
128KB
256KB
512KB
Audio
YM-3812
YM-3014
Logic
NerdConsole uses a variety of logic chips for address decoding, holding register values, and buffering data as it moves between systems.
74HCT00
This chip provides four 2-input NAND gates.
| 1A | 1 | 14 | VCC |
|---|---|---|---|
| 1B | 2 | 13 | 4B |
| 1Y | 3 | 12 | 4A |
| 2A | 4 | 11 | 4Y |
| 2B | 5 | 10 | 3B |
| 2Y | 6 | 9 | 3A |
| GND | 7 | 8 | 3Y |
74HCT08
This chip provides four 2-input AND gates.
| 1A | 1 | 14 | VCC |
|---|---|---|---|
| 1B | 2 | 13 | 4B |
| 1Y | 3 | 12 | 4A |
| 2A | 4 | 11 | 4Y |
| 2B | 5 | 10 | 3B |
| 2Y | 6 | 9 | 3A |
| GND | 7 | 8 | 3Y |
74HCT14
This chip provides six signal inverters.
| 1A | 1 | 14 | VCC |
|---|---|---|---|
| 1Y | 2 | 13 | 6A |
| 2A | 3 | 12 | 6Y |
| 2Y | 4 | 11 | 5A |
| 3A | 5 | 10 | 5Y |
| 3Y | 6 | 9 | 4A |
| GND | 7 | 8 | 4Y |
74HCT30
This chip provides a single 8-input NAND gate. This is used to identify when extended RAM bank 255 is selected and thus extended RAM writes should instead be directed to the PPU.
| A | 1 | 14 | VCC |
|---|---|---|---|
| B | 2 | 13 | NC |
| C | 3 | 12 | H |
| D | 4 | 11 | G |
| E | 5 | 10 | NC |
| F | 6 | 9 | NC |
| GND | 7 | 8 | Y |
74HCT32
This chip provides four 2-input OR gates.
| 1A | 1 | 14 | VCC |
|---|---|---|---|
| 1B | 2 | 13 | 4B |
| 1Y | 3 | 12 | 4A |
| 2A | 4 | 11 | 4Y |
| 2B | 5 | 10 | 3B |
| 2Y | 6 | 9 | 3A |
| GND | 7 | 8 | 3Y |
74HCT139
This chip is provides 2 separate 2 to 4 line decoders. Each takes 2 inputs as a 2-bit number (0-3) and turns on the single line that corresponds to that number as output.
| ~1G | 1 | 16 | VCC |
|---|---|---|---|
| 1A | 2 | 15 | ~2G |
| 1B | 3 | 14 | 2A |
| 1Y0 | 4 | 13 | 2B |
| 1Y1 | 5 | 12 | 2Y0 |
| 1Y2 | 6 | 11 | 2Y1 |
| 1Y3 | 7 | 10 | 2Y2 |
| GND | 8 | 9 | 2Y3 |
74HCT238
This chip is a 3 to 8 line decoder. It takes 3 inputs as a 3-bit number (0-7) and turns on the single line that corresponds to that number as output.
| A0 | 1 | 16 | VCC |
|---|---|---|---|
| A1 | 2 | 15 | Y0 |
| A2 | 3 | 14 | Y1 |
| ~G0 | 4 | 13 | Y2 |
| ~G1 | 5 | 12 | Y3 |
| G2 | 6 | 11 | Y4 |
| Y7 | 7 | 10 | Y5 |
| GND | 8 | 9 | Y6 |
74HCT240
This chip reads the state of all 8 possible controllers and inverts the signal turning the 0s from pressed buttons into 1s.
| ~1OE | 1 | 20 | VCC |
|---|---|---|---|
| 1A0 | 2 | 19 | ~2OE |
| ~2Y3 | 3 | 18 | ~1Y0 |
| 1A1 | 4 | 17 | 2A3 |
| ~2Y2 | 5 | 16 | ~1Y1 |
| 1A2 | 6 | 15 | 2A2 |
| ~2Y1 | 7 | 14 | ~1Y2 |
| 1A3 | 8 | 13 | 2A1 |
| ~2Y0 | 9 | 12 | ~1Y3 |
| GND | 10 | 11 | 2A0 |
74HCT273
This chip provides an octal D-type flip-flops with a clear pin for ensuring a known state upon system reset. These are commonly used for holding upper address pin values for bank selection.
| ~CLR | 1 | 20 | VCC |
|---|---|---|---|
| 1Q | 2 | 19 | 8Q |
| 1D | 3 | 18 | 8D |
| 2D | 4 | 17 | 7D |
| 2Q | 5 | 16 | 7Q |
| 3Q | 6 | 15 | 6Q |
| 3D | 7 | 14 | 6D |
| 4D | 8 | 13 | 5D |
| 4Q | 9 | 12 | 5Q |
| GND | 10 | 11 | CLK |